Instruction Set of 8085 MCQ Quiz - Objective Question with Answer for Instruction Set of 8085 - Download Free PDF

Explanation:

Problem Analysis:

The given problem involves the 8085 microprocessor and the execution of the Rotate Left through Accumulator (RAL) instruction to achieve a specific result. The accumulator initially contains the value AAH, and the carry flag (CY) is initialized to 0. The goal is to determine how many times the RAL instruction needs to be executed for the accumulator to contain the value A9H, and to determine the state of the carry flag (CY) at that point.

RAL Instruction:

The RAL (Rotate Accumulator Left through Carry) instruction rotates the contents of the accumulator one bit to the left. The high-order (leftmost) bit of the accumulator is moved into the carry flag (CY), and the carry flag's previous value is moved into the low-order (rightmost) bit of the accumulator. This operation is performed as follows:

• Bit 7 → CY
• CY (previous value) → Bit 0
• Bits 6 through 0 → Bits 7 through 1

The operation is cyclic, meaning the carry flag value re-enters the accumulator. This is crucial for understanding how the accumulator's value evolves with each execution of the RAL instruction.

Initial Conditions:

• Accumulator: AAH (binary: 10101010)
• Carry flag (CY): 0

Target:

• Accumulator: A9H (binary: 10101001)
• State of CY: To be determined

Step-by-Step Execution of RAL:

We will execute the RAL instruction repeatedly, tracking the changes in the accumulator and the carry flag (CY) at each step.

1. Initial State:
   • Accumulator: 10101010 (AAH)
   • Carry flag (CY): 0
2. First Execution of RAL:
   • Operation: Rotate left through carry
   • Bit 7 (1) → CY
   • CY (0) → Bit 0
   • Result:
     • Accumulator: 01010100 (54H)
     • Carry flag (CY): 1
3. Second Execution of RAL:
   • Operation: Rotate left through carry
   • Bit 7 (0) → CY
   • CY (1) → Bit 0
   • Result:
     • Accumulator: 10101001 (A9H)
     • Carry flag (CY): 0

After the second execution of RAL, the accumulator contains A9H, and the carry flag (CY) is 0. Therefore, the instruction RAL must be executed 2 times to achieve the desired result.

Final Answer:

The instruction RAL must be executed 2 times, and at that instant, the carry flag (CY) will be 0.

Correct Option: Option 1: 2 times; CY = 0

Important Information

To further understand the analysis, let’s evaluate the other options:

Option 2: 4 times; CY = 0

This option is incorrect because the accumulator reaches the value A9H after only 2 executions of the RAL instruction, not 4. Additionally, the carry flag (CY) is 0 after 2 executions, making this option partially correct but not fully accurate.

Option 3: 4 times; CY = 1

This option is incorrect for two reasons. First, the accumulator reaches the value A9H after 2 executions, not 4. Second, the carry flag (CY) is 0 at this point, not 1. Executing RAL 4 times would lead to a different accumulator value.

Option 4: 2 times; CY = 1

This option is incorrect because while the accumulator does reach A9H after 2 executions of RAL, the carry flag (CY) is 0, not 1. This discrepancy makes the option inaccurate.

Conclusion:

The analysis of the problem and the RAL instruction demonstrates that the correct answer is Option 1: 2 times; CY = 0. The accumulator reaches the value A9H after 2 executions of RAL, and the carry flag (CY) is 0 at that point. Understanding the RAL instruction's operation and tracking the bit-level changes are crucial for solving similar problems involving rotate instructions in microprocessors.

Explanation:

8085 Microprocessor PUSH Instruction

Definition: The PUSH instruction in the 8085 microprocessor is used to copy the contents of a specified register pair onto the stack. The stack is a reserved portion of memory used for temporary data storage, and the Stack Pointer (SP) register holds the address of the top of the stack. During the execution of the PUSH instruction, the contents of the register pair are stored onto the stack, and the Stack Pointer is decremented accordingly.

Working Principle: When the PUSH instruction is executed:

• The Stack Pointer (SP) is decremented twice to allocate space for the contents of the register pair being pushed onto the stack.
• The higher-order byte (most significant byte) of the register pair is stored at the memory location pointed to by the updated SP.
• The SP is decremented again, and the lower-order byte (least significant byte) of the register pair is stored at the next memory location.

Solution:

Let us analyze the situation step by step:

1. **Initial Condition:**

• Stack Pointer (SP) = 2000H
• Register pair DE = 1050H

2. **Execution of PUSH D:**

• First, the Stack Pointer (SP) is decremented by 1. New SP = 2000H - 1 = 1FFFH.
• The higher-order byte of DE (10H) is stored at the memory location 1FFFH.
• The Stack Pointer (SP) is decremented again by 1. New SP = 1FFFH - 1 = 1FFEH.
• The lower-order byte of DE (50H) is stored at the memory location 1FFEH.

3. **Final Condition:**

• After the execution of PUSH D, the Stack Pointer (SP) points to 1FFEH.

Correct Option Analysis:

The correct option is:

Option 3: 1FFEH

This option is correct because, after the execution of the PUSH instruction, the Stack Pointer is decremented twice, and the final value is 1FFEH.

Additional Information

To further understand the analysis, let’s evaluate the other options:

Option 1: 2000H

This option is incorrect because the Stack Pointer is decremented during the execution of the PUSH instruction. The initial value of SP is 2000H, but it cannot remain unchanged after the instruction execution.

Option 2: 1FFDH

This option is incorrect because the Stack Pointer is decremented twice during the execution of the PUSH instruction. After the first decrement, SP = 1FFFH, and after the second decrement, SP = 1FFEH, not 1FFDH.

Option 4: 1FFFH

This option is incorrect because the Stack Pointer is decremented twice during the execution of the PUSH instruction. After the first decrement, SP = 1FFFH, but it is decremented again to 1FFEH.

Conclusion:

Understanding the behavior of the Stack Pointer during the execution of stack-related instructions such as PUSH is crucial in microprocessor programming. In this case, the PUSH D instruction decrements the Stack Pointer twice and stores the contents of the DE register pair onto the stack. The final value of the Stack Pointer is 1FFEH, which is correctly identified in Option 3.

Concept:-

Accumulator: An accumulator is a register for short-term, intermediate storage of arithmetic and logic data in a computer's CPU.

RAL instruction: It stands for Rotate Accumulator left. It is an implicit Addressing mode having an opcode size of 1 byte.

Even if our accumulator is 8 bit, the RAL instruction is going to follow 9-bit rotation as it will include carry also.

Analysis:

• The first RAL instruction shifts the bits in the accumulator one position to the left, effectively multiplying the number by 2.
• The second RAL instruction shifts the bits again, multiplying the number by 2² = 4.
• The third RAL instruction shifts the bits again, multiplying the number by 2³ = 8.

Stack pointer

A stack pointer is a small register that stores the memory address of the last data element added to the stack or, in some cases, the first available address in the stack.

PUSH Command

Push operation refers to inserting an element in the stack. Since there's only one position at which the new element can be inserted into the top of the stack, the new element is inserted at the top of the stack.

Explanation:

It is given that the stack pointer is pointing to the memory location 2000H. 

This means that 2000H is the memory location that is at the top of the stack.

After the execution of instruction PUSH D, a new element is inserted at the top of the stack. In this element, the data 1050H will be stored.

The memory address of the newly added element is given by 2000H + 0001H.

2000 H = 0010 0000 0000 0000

0001 H = 0000 0000 0000 0001

2000H + 0001H = 0001 1111 1111 1111

0001 1111 1111 1111 = 1FFEH

The stack pointer would be pointing at the memory address 1FFEH

Steps in the instruction cycle:

• First of all, the opcode is fetched by the microprocessor from a stored memory location.
• Then it is decoded by the microprocessor to find out which operation it needs to perform.
• If an instruction contains data or operand address that is still in the memory, the CPU has to perform a read operation to get the desired data.
• After receiving the data, it performs to execute the operation.

Correct sequence: fetch → decode → read effective address → execute

In a stack, all operations take place at the "top" of the stack.

The "push" operation adds an item to the top of the stack.

The "pop" operation removes the item on the top of the stack and returns it.

• The register associated with the stack is Stack Pointer.
• The stack pointer stores the address of the top of the stack.
• Since in 8085 address is of 16 bit, the size of the stack pointer is 16 bits.

• The time taken to execute an instruction is called the instruction cycle.
• Time taken to execute are operation is known as the machine cycle.
• Generally, one instruction will contain 1 to 5 machine cycles.
• The portion of the machine cycle executed in one internal clock pulse is known as T-state.
• T-state starts at the falling edge of a clock pulse.


Various operations performed by 8085 are:

• Opcode fetch and execute: Most of the instruction needs 4T-states, but some instruction needs more than 4T-states. For Ex- HLT, CALL, DCX, etc
• Memory Read – 3T
• Memory write – 3T
• I/O read – 3T
• I/O write – 3T

 

“STA 1234” means store from ‘A’ register to the memory location.

It is a 3-byte instruction.

The opcode fetch and execute – 4T

1^st-byte address fetch – 3T

2^nd-byte address fetch – 3T

Write to memory (from A) – 3T

Total - 13 T states

POP = Post Increment operation and value of SP is Incremented by 2

E.g. POP B

B ← [SP]

SP ← SP +1

C ←  [SP]

SP ← SP +1

Additional Information

PUSH = Pre decrement operation and value of SP is decremented by 2

E.g. PUSH B

SP → SP -1

C → [SP]

SP → SP -1

B → [SP]

The correct option is 2

Concept:

CMP (compare register or memory with accumulator):

The contents of the operand register or memory are compared with the contents of the accumulator. Both contents are preserved. The result of the comparison is shown by setting the flags of the PSW as follows:

if (A) carry flag is set.

if (A) = reg/mem: zero flag is set.

if (A) > reg/mem: carry and zero flags are reset.

• During normal operation, the microprocessor sequentially fetches, decodes and executes one instruction after another until a halt instruction (HLT) is executed.
• The fetching, decoding, and execution of a single instruction constitute an instruction cycle, which consists of one to five read or write operations between the processor ad the memory or input/output devices.
• In other words, to move byte of data IN or OUT of the microprocessor, a machine cycle is required.
• Each machine cycle consists of 3 to 6 clock cycles, referred to as T-states.
• We can, therefore, say that one instruction cycle consists of one to five machine cycles and one machine cycle consists of three to six T-states, i.e. three to six clock periods.
• This is explained with the help of the below figure:

 

Machine Cycle: Time taken to execute one OPERATION is known as a machine cycle.  One instruction will contain 1 to 5 machine cycles.

T-State: The portion of a machine cycle executed in one internal clock pulse is known as T-state.

 T states starts at the falling edge of a clock pulse.

STA address

It requires 4 Machine cycles.

1 Opcode fetch (4T)

2 Memory read (3T + 3T)

1 Memory write (3T)

Total number T-states = 13T

Concept:-

Accumulator: An accumulator is a register for short-term, intermediate storage of arithmetic and logic data in a computer's CPU.

RAL instruction: It stands for Rotate Accumulator left. It is an implicit Addressing mode having an opcode size of 1 byte.

Even if our accumulator is 8 bit, the RAL instruction is going to follow 9-bit rotation as it will include carry also.

Calculation:-

Given

Accumulator A: AA_H = (10101010)₂

Carry CY: 0

Applying RAL instruction for the first time.

Carry CY: 1

Accumulator A: 54_H

Applying RAL instruction for the second time.

Now, the content of  Accumulator A:  A9_H

We may confuse RAL instruction with RLC, in RLC instruction Accumulator is rotated without carry so RLC is an 8-bit rotation.

Important Points

RAR instruction stands for Rotate Accumulator Right. It also follows 9-bit rotation as it also includes carry in its rotation. 

RAR instruction may be confused with RRC instruction, the latter is Rotate Accumulator Right without carry and it is an 8-bit rotation instruction.

The Correct option is 4

Concept:

MVI:  

• MVI is a mnemonic, which actually means “Move Immediately”. With this instruction, we can load a register with an 8-bit or 1-Byte value.
• This instruction supports an immediate addressing mode for specifying the data in the instruction.
• In the instruction “d8” stands for any 8-bit data, and ‘r’ stands for any one of the registers e.g. A, B, C, D, E, H or L. So this r can replace any one of the seven registers.

As ‘r’ can have any of the seven register names, so there are seven opcodes for this type of instruction. It occupies 2-Bytes in the memory.

Explanation:

CPI stands for cycles per instructions.

1. It tells the average number of CPU cycles required to retire an instruction, and therefore is an indicator of how much latency in the system affected the running application.

2. Since CPI is a ratio, it will be affected by either change in the number of CPU cycles that an application takes (the numerator) or changes in the number of instructions executed (the denominator). For that reason, CPI is best used for comparison when only one part of the ratio is changing.

MOV DPTR,#data16-

Function: Load data pointer with a 16 bit constant. 

Description: 

The Data Pointer is loaded with the 16-bit constant indicated. the 16-bit constant is loaded into the second and third bytes of the instruction. The second byte (DPH) is the high-order byte, while the third byte (DPL) holds the low-order byte. No flags are affected. This is the only instruction that moves 16-bits of data at once.

Example: 

The instruction, MOV DPTR, 1234H will load the value 1234H into the Data Pointer. DPH will hold 12H and DPL will hold 34H.

Byte: 3

Number of cycles required for execution: 2